Figures 3 and 4 describe nanowires based crossbar circuits storing programmed bits. Page 3, Para 4: "The results of writing and reading all the bits in a ‘defect-free’ 8×8 crossbar memory can be seen in figure 3(b). The actual value for the low-resistance state (0) and the high-resistance state (1) varied between 10^6–5 × 10^8 and >4 × 10^9, respectively. In fact, it was still easy in the case of this 8 × 8 crossbar to distinguish a low bit from a high bit, because the highest low bit (~5×10^8) was still much lower in resistance than the lowest high bit (>4 × 10^9). As a demonstration, this 64-bit memory was used to store the word ‘HPinvent’ with standard ASCII characters (figure 3(b))."

Figures 3 and 4 describe nanowires based crossbar circuits storing programmed bits. Page 3, Para 4: "The results of writing and reading all the bits in a ‘defect-free’ 8×8 crossbar memory can be seen in figure 3(b). The actual value for the low-resistance state (0) and the high-resistance state (1) varied between 10^6–5 × 10^8 and >4 × 10^9, respectively. In fact, it was still easy in the case of this 8 × 8 crossbar to distinguish a low bit from a high bit, because the highest low bit (~5×10^8) was still much lower in resistance than the lowest high bit (>4 × 10^9). As a demonstration, this 64-bit memory was used to store the word ‘HPinvent’ with standard ASCII characters (figure 3(b))."

Some

Page 3, below Fig. 3, explaining Fig. 3(b): "...The resistances of the cross points representing ‘0’ states, which ranged between 106 and 5 × 108
, are shown in the bottom half of the plot; the resistances of the cross points representing ‘1’ states, which are >4 × 109
, are shown in the top half of the diagram. The bit state at each cross point is indicated by a ‘0’ or ‘1’ in figure 3(a)."

Page 3, below Fig. 3, explaining Fig. 3(b): "...The resistances of the cross points representing ‘0’ states, which ranged between 106 and 5 × 108 *, are shown in the bottom half of the plot; the resistances of the cross points representing ‘1’ states, which are >4 × 109 *, are shown in the top half of the diagram. The bit state at each cross point is indicated by a ‘0’ or ‘1’ in figure 3(a)."

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Page 1, Para 2: “To satisfy all three of the above requirements, we have proposed nanoscale circuits based on a configurable crossbar architecture to connect molecular switches [15–17] in a two-dimensional grid (as shown schematically in figure 1(a)). A crossbar has several advantages. First, the wire dimensions can be scaled continuously down to molecular sizes, while the number of wires in the crossbar can be scaled up arbitrarily to form large-scale generic circuits that can be configured for memory and/or logic applications. Second, it requires only 2N communication wires to individually address 2N nanowires with a demultiplexer [17], which allows the nano-circuit to communicate efficiently with external circuits and systems, for example, CMOS.”

Page 1, Para 2: “To satisfy all three of the above requirements, we have proposed nanoscale circuits based on a configurable crossbar architecture to connect molecular switches [15–17] in a two-dimensional grid (as shown schematically in figure 1(a)). A crossbar has several advantages. First, the wire dimensions can be scaled continuously down to molecular sizes, while the number of wires in the crossbar can be scaled up arbitrarily to form large-scale generic circuits that can be configured for memory and/or logic applications. Second, it requires only 2N communication wires to individually address 2N nanowires with a demultiplexer [17], which allows the nano-circuit to communicate efficiently with external circuits and systems, for example, CMOS.”

All

Page 4, Para 1: “To demonstrate a demultiplexer/multiplexer functionality integrated with memory in a single crossbar, we configured a defect-free 8 × 8 crossbar into a 4 × 4 crossbar memory and two 4 × 4 decoders for the demultiplexer/multiplexers by setting the resistances at specific cross points (table 1(a)), one to control the horizontal wires (E, F, G and H) and the other to control the vertical wires (5, 6, 7 and 8) in the memory (figure 4).”

Page 4, Para 1: “To demonstrate a demultiplexer/multiplexer functionality integrated with memory in a single crossbar, we configured a defect-free 8 × 8 crossbar into a 4 × 4 crossbar memory and two 4 × 4 decoders for the demultiplexer/multiplexers by setting the resistances at specific cross points (table 1(a)), one to control the horizontal wires (E, F, G and H) and the other to control the vertical wires (5, 6, 7 and 8) in the memory (figure 4).”

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The crossbar array of Fig. 3 stores programmed values as described below. Page 3, below Fig. 3 "Figure 3. The crossbar as a 64-bit random access memory. (a) The ideal ‘write’ and ‘read’ modes for the memory. To write a bit, V is increased in increments of 0.5 from 3.5 V until the bit is written or V reaches 7 V, while keeping V = V/2 (in our actual circuit, the vertical nanowires were floating); to read a bit, V = 0.5, and V = 0."

The crossbar array of Fig. 3 stores programmed values as described below. Page 3, below Fig. 3 "Figure 3. The crossbar as a 64-bit random access memory. (a) The ideal ‘write’ and ‘read’ modes for the memory. To write a bit, V is increased in increments of 0.5 from 3.5 V until the bit is written or V reaches 7 V, while keeping V* = V/2 (in our actual circuit, the vertical nanowires were floating); to read a bit, V = 0.5, and V* = 0."

Some

Figures 3 and 4 describe nanowires based crossbar circuits storing programmed bits. Page 3, Para 4: "The results of writing and reading all the bits in a ‘defect-free’ 8×8 crossbar memory can be seen in figure 3(b). The actual value for the low-resistance state (0) and the high-resistance state (1) varied between 10^6–5 × 10^8 and >4 × 10^9, respectively. In fact, it was still easy in the case of this 8 × 8 crossbar to distinguish a low bit from a high bit, because the highest low bit (~5×10^8) was still much lower in resistance than the lowest high bit (>4 × 10^9). As a demonstration, this 64-bit memory was used to store the word ‘HPinvent’ with standard ASCII characters (figure 3(b))."

Figures 3 and 4 describe nanowires based crossbar circuits storing programmed bits. Page 3, Para 4: "The results of writing and reading all the bits in a ‘defect-free’ 8×8 crossbar memory can be seen in figure 3(b). The actual value for the low-resistance state (0) and the high-resistance state (1) varied between 10^6–5 × 10^8 and >4 × 10^9, respectively. In fact, it was still easy in the case of this 8 × 8 crossbar to distinguish a low bit from a high bit, because the highest low bit (~5×10^8) was still much lower in resistance than the lowest high bit (>4 × 10^9). As a demonstration, this 64-bit memory was used to store the word ‘HPinvent’ with standard ASCII characters (figure 3(b))."

Some

Page 3, below Fig. 3, explaining Fig. 3(b): "...The resistances of the cross points representing ‘0’ states, which ranged between 106 and 5 × 108
, are shown in the bottom half of the plot; the resistances of the cross points representing ‘1’ states, which are >4 × 109
, are shown in the top half of the diagram. The bit state at each cross point is indicated by a ‘0’ or ‘1’ in figure 3(a)."

Page 3, below Fig. 3, explaining Fig. 3(b): "...The resistances of the cross points representing ‘0’ states, which ranged between 106 and 5 × 108 *, are shown in the bottom half of the plot; the resistances of the cross points representing ‘1’ states, which are >4 × 109 *, are shown in the top half of the diagram. The bit state at each cross point is indicated by a ‘0’ or ‘1’ in figure 3(a)."

All

Page 1, Para 2: “To satisfy all three of the above requirements, we have proposed nanoscale circuits based on a configurable crossbar architecture to connect molecular switches [15–17] in a two-dimensional grid (as shown schematically in figure 1(a)). A crossbar has several advantages. First, the wire dimensions can be scaled continuously down to molecular sizes, while the number of wires in the crossbar can be scaled up arbitrarily to form large-scale generic circuits that can be configured for memory and/or logic applications. Second, it requires only 2N communication wires to individually address 2N nanowires with a demultiplexer [17], which allows the nano-circuit to communicate efficiently with external circuits and systems, for example, CMOS.”

Page 1, Para 2: “To satisfy all three of the above requirements, we have proposed nanoscale circuits based on a configurable crossbar architecture to connect molecular switches [15–17] in a two-dimensional grid (as shown schematically in figure 1(a)). A crossbar has several advantages. First, the wire dimensions can be scaled continuously down to molecular sizes, while the number of wires in the crossbar can be scaled up arbitrarily to form large-scale generic circuits that can be configured for memory and/or logic applications. Second, it requires only 2N communication wires to individually address 2N nanowires with a demultiplexer [17], which allows the nano-circuit to communicate efficiently with external circuits and systems, for example, CMOS.”

All

Page 4, Para 1: “To demonstrate a demultiplexer/multiplexer functionality integrated with memory in a single crossbar, we configured a defect-free 8 × 8 crossbar into a 4 × 4 crossbar memory and two 4 × 4 decoders for the demultiplexer/multiplexers by setting the resistances at specific cross points (table 1(a)), one to control the horizontal wires (E, F, G and H) and the other to control the vertical wires (5, 6, 7 and 8) in the memory (figure 4).”

Page 4, Para 1: “To demonstrate a demultiplexer/multiplexer functionality integrated with memory in a single crossbar, we configured a defect-free 8 × 8 crossbar into a 4 × 4 crossbar memory and two 4 × 4 decoders for the demultiplexer/multiplexers by setting the resistances at specific cross points (table 1(a)), one to control the horizontal wires (E, F, G and H) and the other to control the vertical wires (5, 6, 7 and 8) in the memory (figure 4).”

All