Pre-Grant Publication Number: 20070233761
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Prior Art Detail
Summary / Description
| Summary / Description | A reconfigurable architecture is based on chemically-assembled electronic nanotechnology (CAEN). A molecular latch based on molecular resonant tunneling diodes (RTDs) provides I/O-isolation, voltage restoration, and high fan-out. Moreover, a nanoblock based on CAEN has been used to implement a AND, OR, XOR gate to achieve computational objectives. |
Basic Information
| Type of Prior Art | Online Publication |
| URL | http://ieeexplore.ieee.org/xpl/... |
| Author/Creator | Goldstein, S.C.; Rosewater, D. |
| Title | Digital Logic using Molecular Electronics |
| Publication Date | February 7, 2002 |
| Publisher | Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International |
| Directions to Document Location | Volume: 1, page(s): 204-459 |
| Additional Information | |
Notes / To Do
| Notes | |
Excerpt
Excerpt Page 1, Para 4: “Figure 1 shows a schematic for a proposed nanoBlock that can be constructed using the above techniques. The MLA is a 2-D grid of reconfigurable diodes [2] that can be configured into circuits based on diode/resistor threshold logic. Figure 2 shows how a nanoBlock can be configured into an AND gate. The reconfigurable nature of the circuit also allows defects to be tolerated [3].” |
Relevance
Claims
1
A computing device comprising:
at least one crossbar array including a first set of N conductive parallel wires (N≧2) forming a set of columns and a second set of M conductive parallel wires (M≧2) forming a set of rows, and formed so as to intersect the first set of conductive parallel wires, wherein intersections are formed between the first and second sets of wires forming M×N crosspoints wherein each of the crosspoints is programmable so as to be in a relatively high conductive state representative of a binary value 1 or a relatively low conductive state representative of a binary value 0;
a programming unit configured to program the crosspoints to have one of the relatively high conductive state or the relatively low conductive state so that at least one column of the crossbar array stores a bit pattern representative of a programmed numerical value;
an input unit configured to provide a bit pattern representative of an input numerical value to the columns of the crossbar array; and
a post-processing unit configured to convert analog signals output from each of the rows of the crossbar array into digital output bit patterns and configured to combine the digital output bit patterns so as to form a resultant bit pattern representative of an output numerical value,
wherein the output numerical value is mathematically dependent on both the programmed numerical value and the input numerical value.
Relevance
Figures 1 and 2 illustrate a crossbar array having basic logic functionality. Additionally, the refrence describes that a nanoblock based on CAEN has been used to implement a AND, OR, XOR gate to achieve computational objectives.
Figures 1 and 2 illustrate a crossbar array having basic logic functionality. Additionally, the refrence describes that a nanoblock based on CAEN has been used to implement a AND, OR, XOR gate to achieve computational objectives.
Claim Chart
All
6
The computing device of Claim 1, wherein the wires of the at least one crossbar array are formed from individual nanotubes or nanotube ribbons.
Relevance
Figures 1 and 2 describes how nanotubes and nanotube ribbons have been used to form a crossbar array.
Figures 1 and 2 describes how nanotubes and nanotube ribbons have been used to form a crossbar array.
Claim Chart
All
11
A method comprising:
providing at least one crossbar array including a first set of N conductive parallel wires (N≧2) forming a set of columns and a second set of M conductive parallel wires (M≧2) forming a set of rows, and formed so as to intersect the first set of conductive parallel wires, wherein intersections are formed between the first and second sets of wires forming M×N crosspoints wherein each of the crosspoints is programmable so as to be in a relatively high conductive state representative of a binary value 1 or a relatively low conductive state representative of a binary value 0;
programming the crosspoints to have one of the relatively high conductive state or the relatively low conductive state so that at least one column of the crossbar array stores a bit pattern representative of a programmed numerical value;
inputting a bit pattern representative of an input numerical value to the columns of the crossbar array; and
converting analog signals output from each of the rows of the crossbar array into digital output bit patterns and configured to combine the digital output bit patterns so as to form a resultant bit pattern representative of an output numerical value,
wherein the output numerical value is mathematically dependent on both the programmed numerical value and the input numerical value.
Relevance
Figures 1 and 2 illustrate a crossbar array having basic logic functionality. Additionally, the refrence describes that a nanoblock based on CAEN has been used to implement a AND, OR, XOR gate to achieve computational objectives.
Figures 1 and 2 illustrate a crossbar array having basic logic functionality. Additionally, the refrence describes that a nanoblock based on CAEN has been used to implement a AND, OR, XOR gate to achieve computational objectives.
Claim Chart
All
16
The method of Claim 11, wherein the wires of the at least one crossbar array are formed from individual nanotubes or nanotube ribbons.
Relevance
Figures 1 and 2 describes how nanotubes and nanotube ribbons have been used to form a crossbar array.
Figures 1 and 2 describes how nanotubes and nanotube ribbons have been used to form a crossbar array.
Claim Chart
All
