| Classifications | Code | Applications | Subscribe |
|---|
| |
| DATA PROCESSING SYSTEM ERROR OR FAULT HANDLING | 714/100000 | 0 | |
| |
| Reliability and availability | 714/001000 | 0 | |
| |
| Fault recovery | 714/002000 | 2 | |
| |
| By masking or reconfiguration | 714/003000 | 1 | |
| |
| Of network | 714/004000 | 1 | |
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| Of memory or peripheral subsystem | 714/005000 | 0 | |
| |
| Redundant stored data accessed (e.g., duplicated data, error correction coded data, or other parity-type data) | 714/006000 | 1 | |
| |
| Reconfiguration (e.g., adding a replacement storage component) | 714/007000 | 0 | |
| |
| Isolating failed storage location (e.g., sector remapping) | 714/008000 | 0 | |
| |
| Access processor affected (e.g., I/O processor, MMU, DMA processor) | 714/009000 | 0 | |
| |
| Of processor | 714/010000 | 0 | |
| |
| Concurrent, redundantly operating processors | 714/011000 | 0 | |
| |
| Synchronization maintenance of processors | 714/012000 | 0 | |
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| Prepared backup processor (e.g., initializing cold backup) or updating backup processor (e.g., by checkpoint message) | 714/013000 | 0 | |
| |
| Of power supply | 714/014000 | 0 | |
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| State recovery (i.e., process or data file) | 714/015000 | 0 | |
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| Forward recovery (e.g., redoing committed action) | 714/016000 | 0 | |
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| Reexecuting single instruction or bus cycle | 714/017000 | 0 | |
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| Transmission data record (e.g., for retransmission) | 714/018000 | 0 | |
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| Undo record | 714/019000 | 0 | |
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| Plural recovery data sets containing set interrelation data (e.g., time values or log record numbers) | 714/020000 | 0 | |
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| State validity check | 714/021000 | 0 | |
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| With power supply status monitoring | 714/022000 | 0 | |
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| Resetting processor | 714/023000 | 0 | |
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| Safe shutdown | 714/024000 | 0 | |
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| Fault locating (i.e., diagnosis or testing) | 714/025000 | 0 | |
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| Artificial intelligence (e.g., diagnostic expert system) | 714/026000 | 1 | |
| |
| Particular access structure | 714/027000 | 0 | |
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| Substituted emulative component (e.g., emulator microprocessor) | 714/028000 | 0 | |
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| Memory emulator feature | 714/029000 | 0 | |
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| Built-in hardware for diagnosing or testing within-system component (e.g., microprocessor test mode circuit, scan path) | 714/030000 | 0 | |
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| Additional processor for in-system fault locating (e.g., distributed diagnosis program) | 714/031000 | 0 | |
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| Particular stimulus creation | 714/032000 | 0 | |
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| Derived from analysis (e.g., of a specification or by stimulation) | 714/033000 | 0 | |
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| Halt, clock, or interrupt signal (e.g., freezing, hardware breakpoint, single-stepping) | 714/034000 | 0 | |
| |
| Substituted or added instruction (e.g., code instrumenting, breakpoint instruction) | 714/035000 | 1 | |
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| Test sequence at power-up or initialization | 714/036000 | 0 | |
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| Analysis (e.g., of output, state, or design) | 714/037000 | 1 | |
| |
| Of computer software | 714/038000 | 1 | |
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| Monitor recognizes sequence of events (e.g., protocol or logic state analyzer) | 714/039000 | 0 | |
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| Component dependent technique | 714/040000 | 0 | |
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| For reliability enhancing component (e.g., testing backup spare, or fault injection) | 714/041000 | 0 | |
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| Memory or storage device component fault | 714/042000 | 0 | |
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| Bus, I/O channel, or network path component fault | 714/043000 | 0 | |
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| Peripheral device component fault | 714/044000 | 0 | |
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| Output recording (e.g., signature or trace) | 714/045000 | 0 | |
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| Operator interface for diagnosing or testing | 714/046000 | 0 | |
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| Performance monitoring for fault avoidance | 714/047000 | 0 | |
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| Error detection or notification | 714/048000 | 0 | |
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| State error (i.e., content of instruction, data, or message) | 714/049000 | 0 | |
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| State out of sequence | 714/050000 | 0 | |
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| Control flow state sequence monitored (e.g., watchdog processor for control-flow checking) | 714/051000 | 0 | |
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| Error checking code | 714/052000 | 0 | |
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| Address error | 714/053000 | 0 | |
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| Storage content error | 714/054000 | 0 | |
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| Timing error (e.g., watchdog timer time-out) | 714/055000 | 0 | |
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| Bus or I/O channel device fault | 714/056000 | 0 | |
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| Error forwarding and presentation (e.g., operator console, error display) | 714/057000 | 2 | |
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| PULSE OR DATA ERROR HANDLING | 714/699000 | 0 | |
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| Skew detection correction | 714/700000 | 0 | |
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| Data formatting to improve error detection correction capability | 714/701000 | 0 | |
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| Memory access (e.g., address permutation) | 714/702000 | 0 | |
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| Testing of error-check system | 714/703000 | 0 | |
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| Error count or rate | 714/704000 | 0 | |
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| Pseudo-error rate | 714/705000 | 0 | |
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| Up-down counter | 714/706000 | 0 | |
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| Synchronization control | 714/707000 | 0 | |
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| Shutdown or establishing system parameter (e.g., transmission rate) | 714/708000 | 0 | |
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| Data pulse evaluation/bit decision | 714/709000 | 0 | |
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| Replacement of memory spare location, portion, or segment | 714/710000 | 0 | |
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| Spare row or column | 714/711000 | 0 | |
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| Transmission facility testing | 714/712000 | 0 | |
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| For channel having repeater | 714/713000 | 0 | |
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| By tone signal | 714/714000 | 0 | |
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| Test pattern with comparison | 714/715000 | 0 | |
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| Loop-back | 714/716000 | 0 | |
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| Loop or ring configuration | 714/717000 | 0 | |
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| Memory testing | 714/718000 | 0 | |
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| Read-in with read-out and compare | 714/719000 | 0 | |
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| Special test pattern (e.g., checkerboard, walking ones) | 714/720000 | 0 | |
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| Electrical parameter (e.g., threshold voltage) | 714/721000 | 1 | |
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| Performing arithmetic function on memory contents | 714/722000 | 0 | |
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| Error mapping or logging | 714/723000 | 0 | |
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| Digital logic testing | 714/724000 | 1 | |
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| Programmable logic array (PLA) testing | 714/725000 | 0 | |
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| Scan path testing (e.g., level sensitive scan design (LSSD)) | 714/726000 | 0 | |
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| Boundary scan | 714/727000 | 0 | |
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| Random pattern generation (includes pseudorandom pattern) | 714/728000 | 0 | |
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| Plural scan paths | 714/729000 | 0 | |
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| Addressing | 714/730000 | 0 | |
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| Clock or synchronization | 714/731000 | 0 | |
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| Signature analysis | 714/732000 | 0 | |
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| Built-in testing circuit (BILBO) | 714/733000 | 1 | |
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| Structural (in-circuit test) | 714/734000 | 0 | |
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| Device response compared to input pattern | 714/735000 | 0 | |
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| Device response compared to expected fault-free response | 714/736000 | 0 | |
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| Device response compared to fault dictionary/truth table | 714/737000 | 0 | |
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| Including test pattern generator | 714/738000 | 1 | |
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| Random pattern generation (includes pseudorandom pattern) | 714/739000 | 0 | |
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| Having analog signal | 714/740000 | 0 | |
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| Simulation | 714/741000 | 0 | |
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| Testing specific device | 714/742000 | 0 | |
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| Addressing | 714/743000 | 0 | |
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| Clock or synchronization | 714/744000 | 0 | |
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| Determination of marginal operation limits | 714/745000 | 0 | |
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| Digital data error correction | 714/746000 | 0 | |
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| Substitution of previous valid data | 714/747000 | 0 | |
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| Request for retransmission | 714/748000 | 2 | |
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| Retransmission if no ACK returned | 714/749000 | 1 | |
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| Feedback to transmitter for comparison | 714/750000 | 0 | |
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| Including forward error correction capability | 714/751000 | 0 | |
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| Forward correction by block code | 714/752000 | 0 | |
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| Double error correcting with single error correcting code | 714/753000 | 0 | |
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| Error correction during refresh cycle | 714/754000 | 0 | |
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| Double encoding codes (e.g., product, concatenated) | 714/755000 | 2 | |
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| Cross-interleave Reed-Solomon code (CIRC) | 714/756000 | 0 | |
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| Parallel generation of check bits | 714/757000 | 0 | |
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| Error correcting code with additional error detection code (e.g., cyclic redundancy character, parity) | 714/758000 | 0 | |
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| Look-up table encoding or decoding | 714/759000 | 0 | |
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| Threshold decoding (e.g., majority logic) | 714/760000 | 0 | |
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| Random and burst error correction | 714/761000 | 0 | |
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| Burst error correction | 714/762000 | 0 | |
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| Memory access | 714/763000 | 2 | |
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| Error correct and restore | 714/764000 | 0 | |
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| Error pointer | 714/765000 | 0 | |
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| Check bits stored in separate area of memory | 714/766000 | 0 | |
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| Code word for plural n-bit (n>1) storage units (e.g., x4 DRAM's) | 714/767000 | 0 | |
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| Error correction code for memory address | 714/768000 | 0 | |
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| Dynamic data storage | 714/769000 | 0 | |
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| Disk array | 714/770000 | 0 | |
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| Tape | 714/771000 | 0 | |
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| Code word parallel access | 714/772000 | 0 | |
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| Solid state memory | 714/773000 | 0 | |
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| Adaptive error-correcting capability | 714/774000 | 0 | |
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| Synchronization | 714/775000 | 0 | |
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| For packet or frame multiplexed data | 714/776000 | 0 | |
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| Hamming code | 714/777000 | 0 | |
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| Nonbinary data (e.g., ternary) | 714/778000 | 0 | |
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| Variable length data | 714/779000 | 0 | |
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| Using symbol reliability information (e.g., soft decision) | 714/780000 | 0 | |
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| Code based on generator polynomial | 714/781000 | 0 | |
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| Bose-Chaudhuri-Hocquenghem code | 714/782000 | 0 | |
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| Golay code | 714/783000 | 0 | |
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| Reed-Solomon code | 714/784000 | 0 | |
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| Syndrome computed | 714/785000 | 0 | |
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| Forward error correction by tree code (e.g., convolutional) | 714/786000 | 0 | |
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| Random and burst errors | 714/787000 | 0 | |
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| Burst error | 714/788000 | 0 | |
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| Synchronization | 714/789000 | 0 | |
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| Puncturing | 714/790000 | 0 | |
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| Sequential decoder (e.g., Fano or stack algorithm) | 714/791000 | 0 | |
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| Trellis code | 714/792000 | 0 | |
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| Syndrome decodable (e.g., self orthogonal) | 714/793000 | 0 | |
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| Maximum likelihood | 714/794000 | 0 | |
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| Viterbi decoding | 714/795000 | 0 | |
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| Branch metric calculation | 714/796000 | 0 | |
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| Majority decision/voter circuit | 714/797000 | 0 | |
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| Error detection for synchronization control | 714/798000 | 0 | |
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| Error/fault detection technique | 714/799000 | 0 | |
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| Parity bit | 714/800000 | 0 | |
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| Parity generator or checker circuit detail | 714/801000 | 0 | |
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| Even and odd parity | 714/802000 | 0 | |
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| Parity prediction | 714/803000 | 0 | |
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| Plural dimension parity check | 714/804000 | 0 | |
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| Storage accessing (e.g., address parity check) | 714/805000 | 0 | |
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| Constant-ratio code (m/n) | 714/806000 | 0 | |
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| Check character | 714/807000 | 0 | |
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| Modulo-n residue check character | 714/808000 | 0 | |
| |
| Code constraint monitored | 714/809000 | 0 | |
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| Multilevel coding (n>2) | 714/810000 | 0 | |
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| Forbidden combination or improper condition | 714/811000 | 0 | |
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| Specified digital signal or pulse count | 714/812000 | 0 | |
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| Two key-down detector | 714/813000 | 0 | |
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| Data timing/clocking | 714/814000 | 0 | |
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| Time delay/interval monitored | 714/815000 | 0 | |
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| Two-rail logic | 714/816000 | 0 | |
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| Noise level | 714/817000 | 0 | |
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| Missing-bit/drop-out detection | 714/818000 | 0 | |
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| Comparison of data | 714/819000 | 0 | |
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| Plural parallel devices of channels | 714/820000 | 0 | |
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| Transmission facility | 714/821000 | 0 | |
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| Sequential repetition | 714/822000 | 0 | |
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| True and complement data | 714/823000 | 0 | |
| |
| Device output compared to input | 714/824000 | 0 | |
| |
| FOREIGN ART COLLECTIONS | 714 | 0 | |
| |
| CLASS-RELATED FOREIGN DOCUMENTS | 714/FOR000 | 0 | |
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| MEMORY TESTING (371/21.1) | 714 | 0 | |
| |
| DIGITAL LOGIC TESTING (371/22.1) | 714 | 0 | |
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| DIGITAL DATA ERROR CORRECTION (371/30) | 714 | 0 | |
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| Scan path testing (LSSD) (371/22.3) | 714/FOR100 | 0 | |
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| Including test pattern generator (371/27) | 714/FOR101 | 0 | |
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| Block code (371/37.1) | 714/FOR102 | 0 | |
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| Memory access (371/40.1) | 714/FOR103 | 0 | |
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| Convolutional code (371/43) | 714/FOR104 | 0 | |
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| ERROR/FAULT ANTICIPATION (371/4) | 714/FOR288 | 0 | |
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| Replacement with spare device or system (371/8.1) | 714 | 0 | |
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| Transmission facility or channel (371.8.2) | 714/FOR289 | 0 | |
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| Memory (371/10.1) | 714/FOR290 | 0 | |
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| Transmission facility (371/11.2) | 714/FOR291 | 0 | |
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| Data processor or computer (371/11.3) | 714/FOR292 | 0 | |
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| DIAGNOSTIC TESTING (371/15.1) | 714 | 0 | |
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| Programmable processor testing (371/16.1) | 714/FOR293 | 0 | |
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| Emulator device (371/16.2) | 714/FOR294 | 0 | |
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| Watchdog timer (e.g., time-out) (371/16.3) | 714/FOR295 | 0 | |
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| Processor within diverse (microwave, photocopier) (371/16.4) | 714/FOR296 | 0 | |
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| Error or fault, logging or tracking (371/16.5) | 714/FOR297 | 0 | |
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| Dedicated maintenance subsystem (371/18) | 714/FOR298 | 0 | |
| |
| Testing of external device by programmable digital computer (371/20) | 714/FOR299 | 0 | |
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| ERROR DETECTION FOR SYNCHRONIZATION CONTROL (371/47.1) | 714/FOR300 | 0 | |
| |
| ERROR DETECTION; ERROR CORRECTION; MONITORING (EPO) | 714/E11001 | 1 | |
| |
| Error detection other than by redundancy in data representation, operation, or hardware, or by checking the order of processing (EPO) | 714/E11002 | 0 | |
| |
| By time limit, i.e., time-out (EPO) | 714/E11003 | 0 | |
| |
| By count or rate limit, e.g., word- or bit count limit, etc. (EPO) | 714/E11004 | 0 | |
| |
| By other limits, e.g., analog values, etc. (EPO) | 714/E11005 | 0 | |
| |
| By bit configuration check, e.g., of formats or tags, etc. (EPO) | 714/E11006 | 0 | |
| |
| Error correction, recovery or fault tolerance using at least two different redundancy techniques and at least one technique not involving redundancy (EPO) | 714/E11007 | 0 | |
| |
| Fault tolerant software (EPO) | 714/E11008 | 0 | |
| |
| In regular structures, i.e., all of the systems nodes have the same number of connections per node (EPO) | 714/E11009 | 0 | |
| |
| Interconnection networks, i.e., comprising interconnecting link and switching elements (EPO) | 714/E11010 | 0 | |
| |
| Fault-tolerant routing (EPO) | 714/E11011 | 0 | |
| |
| In rings and buses (EPO) | 714/E11012 | 0 | |
| |
| In n-dimensional structures, e.g., arrays, trees, cubes, etc. (EPO) | 714/E11013 | 0 | |
| |
| Neural networks (EPO) | 714/E11014 | 0 | |
| |
| By degradation, i.e., a slow-down occurs but full processing capability is maintained, e.g., discarding a faulty element or unit, etc. (EPO) | 714/E11015 | 0 | |
| |
| In systems, e.g., multiprocessors, etc. (EPO) | 714/E11016 | 0 | |
| |
| Security measures, i.e., ensuring safe condition in the event of error, e.g., for controlling element (EPO) | 714/E11017 | 0 | |
| |
| Protecting against parasitic influences, e.g., noise, temperatures, etc. (EPO) | 714/E11018 | 0 | |
| |
| Identification, e.g., of a performed repair, of a defined circuit, etc. (EPO) | 714/E11019 | 0 | |
| |
| Reliability or availability analysis (EPO) | 714/E11020 | 0 | |
| |
| Responding to the occurrence of a fault, e.g., fault tolerance, etc. (EPO) | 714/E11021 | 0 | |
| |
| Error or fault processing without redundancy, i.e., by taking additional measures to deal with the error/fault (EPO) | 714/E11022 | 0 | |
| |
| Error or fault handling (EPO) | 714/E11023 | 0 | |
| |
| Error or fault detection or monitoring (EPO) | 714/E11024 | 0 | |
| |
| Error or fault reporting or logging (EPO) | 714/E11025 | 0 | |
| |
| Error or fault localization (EPO) | 714/E11026 | 0 | |
| |
| By collation, i.e., correlating different errors (EPO) | 714/E11027 | 0 | |
| |
| By identifying the faulty software code (EPO) | 714/E11028 | 0 | |
| |
| Error or fault analysis (EPO) | 714/E11029 | 1 | |
| |
| Error detection or correction by redundancy in data representation, e.g., by using checking codes, etc. (EPO) | 714/E11030 | 0 | |
| |
| Using codes with inherent redundancy, e.g., n-out-of-m codes (EPO) | 714/E11031 | 0 | |
| |
| Adding special bits or symbols to the coded information, e.g., parity check, casting out 9's or 11's, etc. (EPO) | 714/E11032 | 1 | |
| |
| Using arithmetic codes i.e., codes which are preserved during operation, e.g., modulo 9 or 11 check, etc. (EPO) | 714/E11033 | 0 | |
| |
| In memories (EPO) | 714/E11034 | 0 | |
| |
| In static stores (EPO) | 714/E11035 | 0 | |
| |
| Integrated on a chip (EPO) | 714/E11036 | 0 | |
| |
| In cache or content addressable memories (EPO) | 714/E11037 | 0 | |
| |
| In sector programmable memories, e.g., flash disk, etc. (EPO) | 714/E11038 | 0 | |
| |
| In multilevel memories (EPO) | 714/E11039 | 0 | |
| |
| To protect a block of data words, e.g., CRC, checksum, etc. (EPO) | 714/E11040 | 0 | |
| |
| To protect individual data words written into, or read out of, the addressable memory subsystem of data processing equipment (EPO) | 714/E11041 | 0 | |
| |
| Codes or arrangements adapted for a specific type of error (EPO) | 714/E11042 | 0 | |
| |
| Error in accessing a memory location, i.e., addressing error (EPO) | 714/E11043 | 0 | |
| |
| Error in check bits (EPO) | 714/E11044 | 0 | |
| |
| Identification of the type of error (EPO) | 714/E11045 | 0 | |
| |
| Adjacent error, e.g., error in n-bit (n>1) wide storage units, i.e., package error, etc. (EPO) | 714/E11046 | 0 | |
| |
| Simple parity (EPO) | 714/E11047 | 0 | |
| |
| Unidirectional errors (EPO) | 714/E11048 | 0 | |
| |
| Arrangements adapted for a specific error detection or correction feature (EPO) | 714/E11049 | 0 | |
| |
| Bypassing or disabling error detection or correction (EPO) | 714/E11050 | 0 | |
| |
| Updating check bits on partial write, i.e., read/modify/write (EPO) | 714/E11051 | 0 | |
| |
| Correcting systematically all correctable errors, i.e., scrubbing (EPO) | 714/E11052 | 0 | |
| |
| Using single parity bit (EPO) | 714/E11053 | 0 | |
| |
| Error detection or correction of the data by redundancy in hardware (EPO) | 714/E11054 | 0 | |
| |
| Error detection by comparing the output signals of redundant hardware (EPO) | 714/E11055 | 0 | |
| |
| In static storage, e.g., matrix, registers, etc. (EPO) | 714/E11056 | 0 | |
| |
| In coding, decoding circuits, e.g. parity circuits (EPO) | 714/E11057 | 0 | |
| |
| In communications, e.g., transmission, interfaces, etc. (EPO) | 714/E11058 | 0 | |
| |
| Control processors, e.g., for sensors, actuators, etc. (EPO) | 714/E11059 | 0 | |
| |
| With exchange of data between units (EPO) | 714/E11060 | 0 | |
| |
| With data processors, i.e., data processors compare their computations (EPO) | 714/E11061 | 0 | |
| |
| In storage with relative movement between record carrier and transducer, e.g., tapes, disks, etc. (EPO) | 714/E11062 | 0 | |
| |
| In systems, i.e. comprising a multiplicity of resources, e.g., cpu with its memory and I/O, etc. (EPO) | 714/E11063 | 0 | |
| |
| In arithmetic, logic or counter circuits or a combination thereof, e.g., alu, adder, etc. (EPO) | 714/E11064 | 0 | |
| |
| In I/O devices or adapters therefor (EPO) | 714/E11065 | 0 | |
| |
| Displays (EPO) | 714/E11066 | 0 | |
| |
| Timing and synchronization therein (EPO) | 714/E11067 | 0 | |
| |
| By using fault tolerant clocks (EPO) | 714/E11068 | 0 | |
| |
| Using passive fault-masking of the redundant circuits, e.g., by quadding or by majority decision circuits, etc. (EPO) | 714/E11069 | 0 | |
| |
| Synchronization therefor (EPO) | 714/E11070 | 0 | |
| |
| Using active fault-masking, e.g., by switching out faulty elements or by switching in spare elements, etc. (EPO) | 714/E11071 | 0 | |
| |
| In systems, e.g., multiprocessors, etc. (EPO) | 714/E11072 | 0 | |
| |
| In distributed systems (EPO) | 714/E11073 | 0 | |
| |
| In regular structures (EPO) | 714/E11074 | 0 | |
| |
| Array of processors, e.g., systolic arrays, etc. (EPO) | 714/E11075 | 0 | |
| |
| Hypercubes (EPO) | 714/E11076 | 0 | |
| |
| Trees (EPO) | 714/E11077 | 0 | |
| |
| In interconnections, e.g., rings, etc. (EPO) | 714/E11078 | 0 | |
| |
| Bus (EPO) | 714/E11079 | 0 | |
| |
| Data exchange between units, e.g., for updating backup units, etc. (EPO) | 714/E11080 | 0 | |
| |
| For control, e.g., actuators, etc. (EPO) | 714/E11081 | 0 | |
| |
| In arithmetic units (EPO) | 714/E11082 | 0 | |
| |
| Redundant power supplies (EPO) | 714/E11083 | 0 | |
| |
| Masking faults in storage systems using spares and/or by reconfiguring (EPO) | 714/E11084 | 0 | |
| |
| Removing defective units from operation (EPO) | 714/E11085 | 0 | |
| |
| Bypassing defective units on a serial bus (EPO) | 714/E11086 | 0 | |
| |
| With address translations and modifications (EPO) | 714/E11087 | 0 | |
| |
| Handling defects in a Redundant Array of Inexpensive Disks (RAID) by remapping (EPO) | 714/E11088 | 0 | |
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| Managing spare storage units (EPO) | 714/E11089 | 0 | |
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| Hot spares (EPO) | 714/E11090 | 0 | |
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| Via redundancy in hardware accessing the storage components (EPO) | 714/E11091 | 0 | |
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| Using redundant I/O processors, storage control units or array controllers (EPO) | 714/E11092 | 0 | |
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| With serial buses (EPO) | 714/E11093 | 0 | |
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| To file servers (EPO) | 714/E11094 | 0 | |
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| Connection redundancy between storage system components (EPO) | 714/E11095 | 0 | |
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| With serial buses (EPO) | 714/E11096 | 0 | |
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| To file servers (EPO) | 714/E11097 | 0 | |
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| Using the replication of data, e.g., with two or more copies, etc. (EPO) | 714/E11098 | 0 | |
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| Duplex memories, e.g., twin boot ROMs, etc. (EPO) | 714/E11099 | 0 | |
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| Duplexed caches, e.g., cashe paired with non-volatile storage, etc. (EPO) | 714/E11100 | 0 | |
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| Mirroring, i.e., the concept of maintaining data on two or more units in the same state at all times (EPO) | 714/E11101 | 0 | |
| |
| Resynchronization of failed mirrors (EPO) | 714/E11102 | 0 | |
| |
| Mirror management, e.g., pairing of units, etc. (EPO) | 714/E11103 | 0 | |
| |
| Mirroring on the same storage unit (EPO) | 714/E11104 | 0 | |
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| Mirroring on different storage units with a common controller (RAID 1) (EPO) | 714/E11105 | 0 | |
| |
| Mirroring with multiple controllers (EPO) | 714/E11106 | 0 | |
| |
| Asynchronous mirroring (EPO) | 714/E11107 | 0 | |
| |
| Synchronous mirroring (EPO) | 714/E11108 | 0 | |
| |
| De-clustering of replicated data (EPO) | 714/E11109 | 0 | |
| |
| Using more than two copies (EPO) | 714/E11110 | 0 | |
| |
| In Logic Arrays, e.g., programmable or iterative logic arrays, etc. (EPO) | 714/E11111 | 0 | |
| |
| Error detection or correction of the data by redundancy in operation (EPO) | 714/E11112 | 0 | |
| |
| Saving, restoring, recovering or retrying (EPO) | 714/E11113 | 1 | |
| |
| At machine instruction level (EPO) | 714/E11114 | 0 | |
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| Checkpointing the instruction stream (EPO) | 714/E11115 | 0 | |
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| For bus or memory accesses (EPO) | 714/E11116 | 0 | |
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| Of application data (EPO) | 714/E11117 | 0 | |
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| Backing up, restoring or mirroring files or drives (EPO) | 714/E11118 | 0 | |
| |
| Backing up, i.e., point-in-time backup (EPO) | 714/E11119 | 0 | |
| |
| Hardware arrangements for backup (EPO) | 714/E11120 | 0 | |
| |
| Backup Management techniques (EPO) | 714/E11121 | 0 | |
| |
| Recovery techniques (EPO) | 714/E11122 | 0 | |
| |
| Selection of contents (EPO) | 714/E11123 | 0 | |
| |
| Scheduling policy (EPO) | 714/E11124 | 0 | |
| |
| For networked environments (EPO) | 714/E11125 | 0 | |
| |
| Nondisruptive backup (EPO) | 714/E11126 | 0 | |
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| Mirroring (EPO) | 714/E11127 | 0 | |
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| Distributed database systems; Replica control (EPO) | 714/E11128 | 0 | |
| |
| Synchronization between mobile agents and networked agents (EPO) | 714/E11129 | 0 | |
| |
| Using logs or checkpoints (EPO) | 714/E11130 | 0 | |
| |
| In transactions (EPO) | 714/E11131 | 0 | |
| |
| At operating system level (EPO) | 714/E11132 | 0 | |
| |
| Boot up procedures (EPO) | 714/E11133 | 0 | |
| |
| Reconfiguring to eliminate the error (EPO) | 714/E11134 | 0 | |
| |
| During software upgrading (EPO) | 714/E11135 | 0 | |
| |
| At file system or disk access level (EPO) | 714/E11136 | 0 | |
| |
| Restarting or rejuvenating (EPO) | 714/E11137 | 0 | |
| |
| Resetting or repowering (EPO) | 714/E11138 | 0 | |
| |
| Cleaning up resources (EPO) | 714/E11139 | 0 | |
| |
| Suspending and resuming a running system (EPO) | 714/E11140 | 0 | |
| |
| Transmit or communication errors (EPO) | 714/E11141 | 0 | |
| |
| Error detection (EPO) | 714/E11142 | 0 | |
| |
| By time redundancy (EPO) | 714/E11143 | 0 | |
| |
| Error avoidance, e.g., error spreading countermeasures, fault avoidance, etc. (EPO) | 714/E11144 | 0 | |
| |
| Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g., start-up testing, etc. (EPO) | 714/E11145 | 0 | |
| |
| Verification or detection of system hardware configuration (EPO) | 714/E11146 | 0 | |
| |
| Logging of test results (EPO) | 714/E11147 | 0 | |
| |
| Test methods (EPO) | 714/E11148 | 0 | |
| |
| Power-On Test, e.g., POST, etc. (EPO) | 714/E11149 | 0 | |
| |
| Configuration test (EPO) | 714/E11150 | 0 | |
| |
| Background testing (EPO) | 714/E11151 | 0 | |
| |
| Periodic testing (EPO) | 714/E11152 | 0 | |
| |
| Test trigger logic (EPO) | 714/E11153 | 0 | |
| |
| Marginal checking (EPO) | 714/E11154 | 0 | |
| |
| Testing of logic operation, e.g., by logic analyzers, etc. (EPO) | 714/E11155 | 0 | |
| |
| Using Fault Dictionaries (EPO) | 714/E11156 | 0 | |
| |
| Using Expert Systems (EPO) | 714/E11157 | 0 | |
| |
| Using Neural Networks (EPO) | 714/E11158 | 0 | |
| |
| Functional testing (EPO) | 714/E11159 | 0 | |
| |
| Reconfiguring circuits for testing, e.g., LSSD, partitioning, etc. (EPO) | 714/E11160 | 0 | |
| |
| Test of buses, lines or interfaces, e.g., stuck-at or open line faults, etc. (EPO) | 714/E11161 | 0 | |
| |
| Test or error correction or detection circuits (EPO) | 714/E11162 | 0 | |
| |
| Test of input/output devices or peripheral units (EPO) | 714/E11163 | 0 | |
| |
| Test of ALU (EPO) | 714/E11164 | 0 | |
| |
| Test of interrupt circuits (EPO) | 714/E11165 | 0 | |
| |
| Test of CPU or processors (EPO) | 714/E11166 | 0 | |
| |
| By simulating additional hardware, e.g., fault simulation, (EPO) | 714/E11167 | 0 | |
| |
| Emulators (EPO) | 714/E11168 | 0 | |
| |
| Built-in tests (EPO) | 714/E11169 | 0 | |
| |
| Tester hardware, i.e., output processing circuits, etc. (EPO) | 714/E11170 | 0 | |
| |
| Test interface between tester and unit under test (EPO) | 714/E11171 | 0 | |
| |
| Using a storage for the test inputs, e.g., test-ROM, script files, etc. (EPO) | 714/E11172 | 0 | |
| |
| Remote test (EPO) | 714/E11173 | 0 | |
| |
| Using a dedicated service processor for test (EPO) | 714/E11174 | 0 | |
| |
| With comparison between actual response and known fault-free response, e.g., signature analyzer, etc. (EPO) | 714/E11175 | 0 | |
| |
| In Multi-processor systems, e.g., one processor becoming the test master, etc. (EPO) | 714/E11176 | 0 | |
| |
| Generation of test inputs, e.g., test vectors, patterns or sequences, etc. (EPO) | 714/E11177 | 0 | |
| |
| By checking the correct order of processing (EPO) | 714/E11178 | 0 | |
| |
| Monitoring (EPO) | 714/E11179 | 1 | |
| |
| With visual or acoustical indication of the functioning of the machine (EPO) | 714/E11180 | 0 | |
| |
| Visualization of programs or trace data (EPO) | 714/E11181 | 0 | |
| |
| Display for diagnostics, e.g., diagnostic result display, self-test user interface, etc. (EPO) | 714/E11182 | 0 | |
| |
| Display of waveforms, e.g., of logic analyzers, etc. (EPO) | 714/E11183 | 0 | |
| |
| Display of status information (EPO) | 714/E11184 | 0 | |
| |
| By lamps or LED's (EPO) | 714/E11185 | 0 | |
| |
| For error or online/offline status (EPO) | 714/E11186 | 0 | |
| |
| Alarm or error message display (EPO) | 714/E11187 | 0 | |
| |
| Computer systems status display (EPO) | 714/E11188 | 0 | |
| |
| Recording or statistical evaluation of computer activity, e.g., of down time, of input/output operation, etc. (EPO) | 714/E11189 | 0 | |
| |
| Of interconnections, e.g., interconnecting networks, etc. (EPO) | 714/E11190 | 0 | |
| |
| Of parallel or distributed programming (EPO) | 714/E11191 | 0 | |
| |
| Performance measurement (EPO) | 714/E11192 | 0 | |
| |
| Workload generation, e.g., scripts, playback etc. (EPO) | 714/E11193 | 0 | |
| |
| Benchmarking (EPO) | 714/E11194 | 0 | |
| |
| Time measurement, e.g., response time, etc. (EPO) | 714/E11195 | 0 | |
| |
| Of active or idle time (EPO) | 714/E11196 | 0 | |
| |
| Performance evaluation by modeling or statistical analysis (EPO) | 714/E11197 | 0 | |
| |
| Performance evaluation by simulation (EPO) | 714/E11198 | 0 | |
| |
| Trace driven simulation (EPO) | 714/E11199 | 0 | |
| |
| Performance evaluation by tracing or monitoring (EPO) | 714/E11200 | 0 | |
| |
| For interfaces, buses (EPO) | 714/E11201 | 0 | |
| |
| For systems (EPO) | 714/E11202 | 0 | |
| |
| Address tracing (EPO) | 714/E11203 | 0 | |
| |
| Data logging (EPO) | 714/E11204 | 0 | |
| |
| Circuit details, i.e., tracer hardware (EPO) | 714/E11205 | 0 | |
| |
| For I/O devices (EPO) | 714/E11206 | 0 | |
| |
| Preventing errors by testing or debugging software (EPO) | 714/E11207 | 0 | |
| |
| Software debugging (EPO) | 714/E11208 | 0 | |
| |
| Compilers or other tools operating on the source text (EPO) | 714/E11209 | 0 | |
| |
| Debuggers (EPO) | 714/E11210 | 0 | |
| |
| Error checking code in the program under test (EPO) | 714/E11211 | 0 | |
| |
| Tracing methods or tools (EPO) | 714/E11212 | 0 | |
| |
| By using additional hardware (EPO) | 714/E11213 | 0 | |
| |
| By making modifications to the CPU (EPO) | 714/E11214 | 0 | |
| |
| By monitoring the bus (EPO) | 714/E11215 | 0 | |
| |
| By emulating the CPU (EPO) | 714/E11216 | 0 | |
| |
| User interfaces for testing or debugging software (EPO) | 714/E11217 | 1 | |
| |
| Methods or tools for writing reliable software and for evaluating software (EPO) | 714/E11218 | 0 | |
| |
| Methods or tools to render software testable (EPO) | 714/E11219 | 0 | |
| |
| Software metrics (EPO) | 714/E11220 | 0 | |
| |