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A system comprisinga processor;

a memory coupled to the processor;

a storage coupled to the processor; and

a dynamic binary translator storable in the storage, loadable into the memory; and

executable by the processor, the dynamic binary translatorto select a code segment for load-store memory disambiguation based at least in part on a measure of likelihood of frequency of execution of the code segment;

to heuristically identify one or more ambiguous memory dependencies in the code segment for disambiguation by a runtime check based at least in part on inspecting instructions in the code segment,

and to use a pointer analysis of the code segment to identify all ambiguous memory dependencies that can be removed by the runtime check.

#254U.S. Patent Application Publication US 2005/0149915 A1

Applies to Claims 1,9

Submitted by: Diane WillisLast updated: over 3 years ago

Patent/Application # 10/747,598

Description

Methods and apparatus for optimizing a program undergoing dynamic binary translation (DBT) using profile information are disclosed. ...optimizes foreign program instructions through an enhanced DBT process. The present disclosure pertains to computers... to methods and an apparatus for optimizing a program undergoing DBT using profile information.

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