Pre-Grant Publication Number: 20080134159
Filing Date: December 05, 2006
Inventors: Bolei Guo, Youfeng Wu
Assignee: Intel Corporation
Current U.S. Classification: 717, 717/154000
View Prior Art for Claim 00001
A method comprising:
in a dynamic binary translator, selecting a code segment for load-store memory disambiguation based at least in part on a measure of likelihood of frequency of execution of the code segment;
heuristically identifying one or more ambiguous memory dependencies in the code segment for disambiguation by runtime checks based at least in part on inspecting instructions in the code segment, and
using a pointer analysis of the code segment to identify all other ambiguous memory dependencies that can be removed by the runtime checks.
Patent/Application # 10/747,598
Description
Methods and apparatus for optimizing a program undergoing dynamic binary translation (DBT) using profile information are disclosed. ...optimizes foreign program instructions through an enhanced
DBT process.
The present disclosure pertains to computers... to methods and an apparatus for optimizing a program undergoing DBT using profile information.
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