An architecture for computing includes nanometer scale crossbar switches configured to perform a logical function in response to a sequence of pulses that encode logic values in the nanometer scale crossbar switches as impedances.

The publication describes crossbar based nanoelectronics, CMOS/nano interface and CMOS interface circuitry. The publication further describes simulation of crossbar nano circuitry having logic and arithmetic implementations.

The reference describes a bottom-up approach in which functional device elements and element arrays have been assembled from solution through the use of electronically well-defined semiconductor nanowire building blocks (or crossbars). Further the reference describes that nanowire junction arrays (crossbars) have been configured as key OR, AND, and NOR logic-gate structures with substantial gain and have been used to implement basic computations.

The US granted patent describes an optical crossbar arithmetic/logic technique for logic and arithmetic operations.