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View Prior Art for Claim 00015

A system comprising: a memory;

a processor including: a cache;

a register tracker to generate a pre-computation slice; and

a pre-computation engine to execute the pre-computation slice to cause data to be prefetched from the memory to the cache.

Applies to Claims 15,8

Submitted by: Keith O'NeilLast updated: over 4 years ago

Title ACM SIGARCH Computer Architecture News , Proceedings of the 27th annual international symposium on C

ISBN

Description

The authors of this paper describe the approach of [[claim 8]]. [[Early load address resolution via register tracking]]

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Applies to Claims 1,10,15,2,3,4,5,8

Submitted by: Juliana AgonCreated: over 4 years ago

Patent/Application # 5933630

Description

Program launch acceleration using cache

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